Hardware Systems & Engineering Projects

Engineered an ultra-low-noise programmable bipolar voltage source and authored embedded firmware to precisely bias avalanche photodiodes within millivolt tolerances.

Designed multi-stage transimpedance amplifiers and GHz-frequency pulse front-ends capable of capturing ultra-fast sub-nanosecond signals with low dark-count noise.

Developed custom FPGA Mezzanine Cards (FMC) complying with high-speed pinout standards, alongside complete FPGA logic synthesis for hardware validation.

Engineered low-noise balanced photodetectors and novel active quenching feedback circuits for stable continuous-variable quantum state measurements.

Engineered an 8-layer controlled impedance stackup with microvias to fan out multiple fine-pitch BGA packages simultaneously without crosstalk or ground bounce.

Integrated high-throughput FPGA fabrics with specialized security coprocessors, routing length-matched high-speed differential pairs with sub-mil tolerance.

Designed multi-phase discrete VRM rails to deliver up to 20A low-voltage core power with low ripple (<15mV pk-pk) under intense dynamic algorithmic loads.

Authored C/C++ bring-up diagnostics to initialize peripheral buses, clock fanouts, and verify signal integrity across all interfaces in the lab.

Took hardware from blank whiteboard architecture to finalized gerbers, BOM optimization, sourcing, prototype validation, and volume fab hand-off.

Implemented an ARM processor core with dual Gigabit Ethernet PHYs, magnetics, USB interfaces, and low-latency serial communication links.

Collaborated closely in SolidWorks/Fusion 360 to model the extruded aluminum chassis, connector cutouts, thermal heat-sink blocks, and gasket seals.

Designed EMI filter barriers, ESD transient suppressors, and robust grounding schemes to ensure continuous operational uptime in enterprise server racks.

Designed constant-current drivers with sub-milliamp noise floors to modulate laser diodes with consistent optical pulse shapes and wavelength stability.

Implemented analog PID feedback loops controlling Thermoelectric Coolers (TEC) to stabilize optical components within ±0.01°C accuracy.

Engineered active and passive physical security circuits with instantaneous zeroization to detect enclosure breach or side-channel physical tampering.

Performed extensive lab characterization using 4 GHz oscilloscopes, spectrum analyzers, and automated test benches to qualify optical eye diagrams.

Designed length-matched bus routing for high-pin count FMC connectors with controlled 50Ω single-ended and 100Ω differential traces.

Designed resilient STM32 and Atmel MCU boards featuring isolated SPI/I2C/UART communication channels and dedicated watchdog supervisory circuits.